CAPH - A High-level actor-based language for programming FPGAs

CAPH is a domain specific language suited to the description and implementation of stream-processing applications on FPGAs. CAPH relies upon the actor/dataflow model of computation. Applications are described as networks of purely dataflow actors exchanging tokens through unidirectional channels. The behavior of each actor is defined as a set of transition rules using pattern matching. The CAPH suite of tools currently comprises a reference interpreter and a compiler producing both SystemC and synthetizable VHDL code.

CAPH has been written in Objective Caml.


Availibility

Current version is 1.5. The compiler is provided both for Unix and Windows platforms (as a bytecode executable for the formers, as a native executable for the latters). It has been tested on a Intel MacBook running MacOS 10.5.7 and Objective Caml 3.12.0 and Windows XP SP3 under BootCamp. On Unix platforms, you will need a recent Objective Caml distribution to run the bytecode. On Windows platforms, the Objective Caml distribution is only required for simulating programs calling external functions. To visualize the data-flow graphs generated by the compiler, you will need the graphviz package. Of course, a working SystemC installation is required for running the SystemC generated code (we use the one distributed by Logic Poet) and VHDL simulation and synthesis tool chain for simulating and synthetizing the VHDL generated code (we use GHDL for simulation and Quartus II from Altera for synthesis).


Related documents

The language reference manual can be obtained here (it also included in the distributed package).

J. Sérot, F. Berry, S. Ahmed. Implementing stream-processing applications on FPGAs : a DSL-based approach. 21st International Conference on Field Programmable Logic and Applications, Chania, Crete, 2-5 sep 2011 [pdf]

J. Sérot, F. Berry, S. Ahmed. CAPH: A Language for Implementing Stream-Processing Applications on FPGAs. In P. Athanas, D. Pnevmatikatos and N. Sklavos, eds, Embedded Systems Design with FPGAs, Springer, 2012, ISBN 978-1-4614-1361-5.


Contact

Feedback, bug report to Jocelyn _dot_ Serot (at) univ.bpclermont.fr

Last update: Jun 15 2012